1. Field of the Invention
The present invention relates to a line memory controller for use in a printer, and more particularly to a printer line memory controller in which image data of each line is read and written in parallel by using a plurality of line memories.
2. Description of the Related Art
In thermal printers, wire-dot printers, ink jet printers, and the like, image data of one line is read from a frame memory and written into a line memory. Thereafter, the image data in the line memory is read and supplied to a head driver. Generally, two line memories are used, and while image data is written into one line memory, image data in the other line memory is read. If a plurality of line memories (hereinafter called a line memory group) are used, two control circuits are used, one being a write control circuit for controlling to write image data into the line memory group and the other being a read control circuit for controlling to read image data from the line memory group.
Although it is necessary to periodically read image data from the line memory group, data write can be performed at any desired timing. In order to simplify the system structure, it is possible to omit the write control circuit, by operating CPU to directly write image data into the line memory group. In this case, three or more line memories are used, and when CPU can intercept a task presently processed, CPU write image data into the line memory group. In writing image data, it is necessary for CPU to manage an address of a line memory to write into next, and to control the timings of writing image data, and to perform other necessary processes. However, if these line memory management and timing control are imposed on CPU which processes other various tasks, a load on CPU becomes great lowering the process speed of the whole system.